The quality or Q factor of on-chip inductors may suffer from capacitive coupling with the silicon substrate and the Eddy currents induced in the silicon substrate. Therefore, inductors may be built in the higher metal levels in order to increase the distance of the inductor to the substrate. This may help to reduce capacitive coupling between the inductor and the substrate. However, the Q factor is still not optimal due to the capacitive coupling that still may exist with the chip substrate as well as the Eddy currents induced in the silicon. A new way of making inductors is needed.